A two port memory cell includes a write port and a read port. The read port includes a read data line that is configured to carry the data read from the memory cell. The write port includes a write data line that is configured to carry the data to be written to the memory cell. In some configurations, the write data line is precharged and/or kept at a predetermined voltage level when the write data line is not used for writing the memory cell. When a write word line is activated to access another memory cell of the same row, the write data line is also coupled to the memory cell responsive to the activated write word line. As a result, the predetermined voltage level at the write data line interferes with a voltage level at a data node of the memory cell. Meanwhile, if a read word line is activated to access the memory cell, the interference of the voltage level at the data node would also interfere with setting a voltage level at the read data line that reflects the logical value stored in the memory cell. In some applications, the interference at the read data line of one memory cell caused by the write operation of another memory cell is sometimes referred to as a “read disturbance” or a “read disturb.”